A pipelined architecture with novel memory structure is proposed with several modifications of the ME algorithm. Fast motion estimation with low hardware cost and less memory access is achieved by proper search strategy, efficient rate distortion optimization (RDO) cost calculation and interpolation components, innovative memory structure and optimized dataflow scheduling. The proposed design is synthesized by SMIC 130 nm CMOS technology process with a clock frequency of 167 MHz and consumes 181.7 K logic gates and 13.8 KB memory, which shows great hardware efficiency compared with other designs. The proposed design was finally integrated within an H.264/AVC encoder for FPGA prototyping and VLSI implementation. The core area of the overall chip is 1.74 mm×1.74 mm with SMIC 65 nm CMOS technology which can support real-time HD(1080P@60fps) encoding with a clock frequency of 350 MHz.

Base on traditional integrated circuit (IC) low power methods, the authors propose three low power technologies for further research and take an implementation of WSN sensor node as an example. At system level, the authors present an optimum scheme combined with compiling technology and a hardware structure which provides special low power modes for WSN. At circuit level, considering clock placement in arithmetic mapping phase, clock operators in collaboration with IC operator design methodology (ODM) is proposed. A low power design of WSN sensor node is implemented to verify the low power technologies presented above. The testing results show that WSN sensor node consumes 167 μW at chip level and PCB system 1.035 mW at PCB system level in deep sleep mode by the three methods.

By analyzing the application demand of the medical electronics, an MCU architecture named PKU-DSPII with application specific instruction set is proposed. Multilevel storage structures with direct memory access controller (DMAC) and abundant system control modules and peripheral interfaces are integrated in the MCU, which supports three booting modes including self-updating mode. PKU-DSPII is implemented with CSMC 0.18μm technology and LQFP package while the die area is 3.2 mm×3.2 mm and the measured power consumption is 96.9 mW at working frequency of 100 MHz.